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UltraEdit 语法高亮配置文件，只需把下列内容添加到你的wordfile文件后，就可以了。此高亮包含Verilog、VHDL、ＡＲＭ和GNU Assembler x86 语法高亮。 /L14"Verilog 1364-2001" Line Comment = // Block Comment On = /* Block Comment Off = */ String Chars = " File Extensions = V VL VMD/Delimiters = ~!@%^&*()-+=|\/{}[]:;"<> , .?#/Function String = "%[a-z0-9]+[ ^t]+[a-z_0-9]+[ ^t]+("/Indent Strings = "begin" "fork" "specify" "config"/Unindent Strings = "end" "join" "endspecify" "endconfig"/C1"Keywords"always and assign automaticbegin buf bufif0 bufif1case casex casez cell cmos configdeassign default defparam design disableedge else end endcase endconfig endmodule endfunction endgenerate endprimitive endspecify endtable endtask eventfor force forever fork functiongenerate genvarhighz0 highz1if ifnone initial inout input instance integerjoinlarge liblist library localparammacromodule medium modulenand negedge nmos none nor noshowcancelled not notif0 notif1or outputparameter pulsestyle_onevent pulsestyle_ondetect pmos posedge primitive pull0 pull1 pullup pulldownreal realtime reg release repeat rcmos rnmos rpmos rtran rtranif0 rtanif1scalared showcancelled signed small specify specparam strength strong0 strong1 supply0 supply1table task time tran tranif0 tranif1 tri tri1 tri0 triand trior triregusevectoredwait wand weak0 weak1 while wire worxnor xor/C2"System"** 'b 'B 'o 'O 'd 'D 'h 'H 'sb 'sB 'so 'sO 'sd 'sD 'sh 'sH 'Sb 'SB 'So 'SO 'Sd 'SD 'Sh 'SH** _$async$and$array $async$and$plane $async$nand$array $async$nand$plane $async$nor$array $async$nor$plane $async$or$array $async$or$plane$bitstoreal$countdrivers$display $displayb $displayh $displayo$dist_chi_square $dist_erlang $dist_exponential $dist_normal $dist_poisson $dist_t $dist_uniform$dumpall $dumpfile $dumpflush $dumplimit $dumpoff $dumpon $dumpportsall $dumpportsflush $dumpportslimit $dumpportsoff $dumpportson $dumpvars$fclose $fdisplayh $fdisplay $fdisplayf $fdisplayb $ferror $fflush $fgetc $fgets $finish $fmonitorb $fmonitor $fmonitorf $fmonitorh $fopen $fread $fscanf $fseek $fsscanf $fstrobe $fstrobebb $fstrobef $fstrobeh $ftel $fullskew $fwriteb $fwritef $fwriteh $fwrite$getpattern$history $hold$incsave $input $itor$key$list $log$monitorb $monitorh $monitoroff $monitoron $monitor $monitoro$nochange $nokey $nolog$period $printtimescale$q_add $q_exam $q_full $q_initialize $q_remove$random $readmemb $readmemh $readmemh $realtime $realtobits $recovery $recrem $removal $reset_count $reset $reset_value $restart $rewind $rtoi$save $scale $scope $sdf_annotate $setup $setuphold $sformat $showscopes $showvariables $showvars $signed $skew $sreadmemb $sreadmemh $stime $stop $strobeb $strobe $strobeh $strobeo $swriteb $swriteh $swriteo $swrite $sync$and$array $sync$and$plane $sync$nand$array $sync$nand$plane $sync$nor$array $sync$nor$plane $sync$or$array $sync$or$plane$test$plusargs $time $timeformat $timeskew$ungetc $unsigned$value$plusargs$width $writeb $writeh $write $writeo/C3"Operators"->+:-:@@**>,;{}+-// /***%>>=>>>>><<=<<<<<!!=!==&&&|||======^^~~~^~&~|?:/C4"Directives"** ``accelerate `autoexepand_vectornets`celldefine`default_nettype `define `default_decay_time `default_trireg_strength `delay_mode_distributed `delay_mode_path `delay_mode_unit `delay_mode_zero`else `elsif `endcelldefine `endif `endprotect `endprotected `expand_vectornets`file`ifdef `ifndef `include`line`noaccelerate `noexpand_vectornets `noremove_gatenames `noremove_netnames `nounconnected_drive`protect `protected`remove_gatenames `remove_netnames `resetall`timescale`unconnected_drive `undef `uselib/C5"DelaysAndParameters"#/L15"VHDL" Line Comment = -- Nocase String Chars = " File Extensions = VHD VHO VHDL/Delimiters = ; ( )'<>=:+/-*|&,/Indent Strings = "entity" "architecture" "component" "begin" "(" "if" "case" "elsif" "else" "when"/Unindent Strings = "end" "else" "elsif"/Open Fold Strings = "(" "process" "component" "entity" "architecture"/Close Fold Strings = ")" "end process" "end component" "end entity" "end architecture"/Function String = "%[ ^t]++^(*: process^)"/Function String 1 = "%[ ^t]++^(entity *^) is"/Function String 2 = "%[ ^t]++^(architecture *^) of"/Function String 3 = "%[ ^t]++^([a-zA-Z_0-9^t]+:[ a-zA-Z_0-9^t]+^)*%*map"/Function String 4 = "%[ ^t]++^(---[a-zA-Z_0-9^t*#=+^- ]+^)"/C1"VHDL reserved words"abs access after alias all and architecture array assert attributebegin block body buffer buscase component configuration constantdisconnect downtoelse elsif end entity exitfile for functiongenerate generic group guardedif impure in inertial inout islabel library linkage literal loopmap modnand new next nor not nullof on open or others outpackage port postponed procedure process purerange record register reject rem report return rol rorselect severity signal shared sla sll sra srl subtypethen to transport typeunaffected untis until usevariablewait when while withxnor xor/C2"VHDL attributes"active ascending ascendingbasedelayed driving driving_valueeventfalling_edgehighimage instance_namelast_active last_event last_value left leftof length lowpath_name pos predquietreverse_range right rightof rising_edgesimple_name stable succtransactionval value/C3"VHDL types"bit bit_vector booleancharacterintegerlinenaturalpositiverealsigned std_logic std_logic_vector stringtext timeunsigned/C4"VHDL Procedures"endfilefile_close file_openread readlinewrite writeline/L16"ARM Assembler" Line Comment = Line Comment Alt = \ Block Comment On = REM String Chars = " Escape Char = " File Extensions = s arm/Delimiters = !"#$%&'()*+,-./:;<=>?@[\]^_`{|}~/Function String = "%[^t ]++.^([A-Za-z0-9_]+^)[^t ]++$"/C1"Branch"** B b BL bl BX bx BLX blx/C2"Data-Processing"** AND and EOR eor SUB sub RSB rsb ADD add ADC adc SBC sbc RSC rsc TST tst TEQ teq CMP cmp CMN cmn ORR orr MOV mov BIC bic MVN mvn LSL lsl LSR lsr ASL asl ASR asr ROR ror RRX rrx NEG neg/C3"Multiply"** MUL mul MLA mla SMULL smull UMULL umull SMLAL smlal UMLAL umlal/C4"Load and Store"** LDR ldr STR str LDM ldm STM stm SWP swp PUSH push POP pop/C5"Exception"** SWI swi BKPT bkpt/C6"Miscellaneous"** CLZ clz MRS mrs MSR msr CDP cdp MRC mrc MCR mcr LDC ldc STC stc/C7"Directives"** OPT EXT EQU DC ALIGN ADR RN FN DIV SQR SWAP VDU NOP BRK SMUL UMUL SMLA UMLA LDF STF ASSERT FILL FILE COND HEAD ORG CN CP DN EXPORT GLOBAL EXTERN FN GBL IMPORT KEEP LCL RLIST RN SET SN ALIGN DATA DC FIELD LTORG MAP SPACE ELSE ENDIF GET INCLUDE IF INCBIN MACRO MEND MEXIT WEND WHILE ENDFUNC ENDP FRAME ADDRESS POP PUSH REGISTER RESTORE SAVE STATE REMEMBER RESTORE FUNCTION PROC AREA ASSERT CODE16 CODE32 CODE READONLY END ENTRY INFO NOFP OPT REQUIRE ROUT SUBT TTL VFPASSERT SCALAR VECTOR ADR FLD LDF NOP/C8"Registers"A1 A2 A3 A4F0 F1 F2 F3 F4 F5 F6 F7 FPIPLRPCR0 R1 R10 R11 R12 R13 R14 R15 R2 R3 R4 R5 R6 R7 R8 R9SL SPV1 V2 V3 V4 V5 V6a1 a2 a3 a4f0 f1 f2 f3 f4 f5 f6 f7 fpiplrpcr0 r1 r10 r11 r12 r13 r14 r15 r2 r3 r4 r5 r6 r7 r8 r9sl spv1 v2 v3 v4 v5 v6/L17"GNU Assembler x86" AASM_LANG Line Comment = # Block Comment On = /* Block Comment Off = */ File Extensions = S s/Function String = "%[a-zA-Z0-9_@?$]+[ ^t]+proc+[ ^t^p]"/Delimiters = ~!@^$&*+=|\/{}[]:;"'<> , ?/Indent Strings = "("/Unindent Strings = ")"/C1"Instructions"aaa aad aam aas adc add addb addw and arplbound bsf bsr bswap bt btc btr btscall callw cbw cdq clc cld cli clts cmc cmov cmp cmpb cmpw cmps cmpsb cmpsd cmpsw cmpxchgcmpxchg8b cpuid cwd cwdedaa das dec decb decw diventer eschltidiv imul in inc incb incw ins insb insd insw int into invd invlpg invoke iret iretdja jae jb jbe jc jcxz je jecxz jg jge jl jle jmp jna jnae jnb jnbe jnc jnejng jnge jnl jnle jno jnp jns jnz jo jp jpe jpo js jzlahf lar lds lea leave les lfs lgdt lgs lidt lldt lmsw lock lods lodsblodsd lodsw loop loope loopne loopnz loopz lsl lss ltrmov movb movs movsb movsd movsw movsx movw movzx mulneg nop notoio or orb out outs outsb outsd outswpop popa popb popad popf popfd popw push pusha phsub pushad pushf pushfd pushwrcl rcr rdmsr rdtsc rep repe repne repnz repz ret retw retf retn rol ror rsdcrsldt rsm rstssahf sal sar sbb scas scasb scasd scasw seta setae setb setbe setc setesetg setge setl setle setna setnae setnb setnc setne setng setnge setnlsetnle setno setnp setns setnz seto setp setpe setpo sets setz sgdt shlshld shr shrd sidt sldt smsw stc std sti stos stosb stosd stosw str subsvdc svldt svtstest testbverr verwwait wbinvd wrmsrxadd xchg xlat xlatb xor xorw xorb/C2** $/C3"Registers"%eax %ebx %ecx %edx %edi %esi %ebp %esp%ax %bx %cx %dx %di %si %bp %sp%ah %al %bh %bl %ch %cl %dh %dl%cs %ds %ss %es %fs %gs%cr0 %cr2 %cr3%db0 %db1 %db2 %db3 %db6 %db7%tr6 %tr7%st %st(0) %st(1) %st(2) %st(3) %st(4) %st(5) %st(6) %st(7)%xmm %xmm0 %xmm1 %xmm2 %xmm3 %xmm4 %xmm5 %xmm6 %xmm7/C4"Directives"** ./C6 MMX 3DNow SIMDaddps addss andnps andpscmpeqps cmpeqss cmpleps cmpless cmpltps cmpltss cmpneqps cmpneqss cmpnlepscmpnless cmpnltps cmpnltss cmpordps cmpordss cmpps cmpss cmpunordpscmpunordss comiss cvtpi2ps cvtps2pi cvtsi2ss cvttps2pi cvttss2si cvtss2sidivps divssemmsfemms fxrstor fxsaveldmxcsrmaskmovq maxps maxss minps minss movaps movd movdf movdt movhps movhlpsmovlhps movlps movmskps movntps movntq movq movss movups mulps mulssorpspackssdw packsswb packuswb paddb paddd paddsb paddsw paddusb paddusw paddwpand pandn pavgb pavgusb pavgw pcmpeqb pcmpeqd pcmpeqd pcmpeqw pcmpgtbpcmpgtd pcmpgtw pextrw pf2id pfacc pfadd pfcmpeq pfcmpge pfcmpgt pfmaxpfmin pfmul pfrcp pfrcpit1 pfrcpit2 pfsqit1 pfrsqrt pfsub pfsubr pi2fdpinsrw pmaddwd pmaxsw pmaxub pminsw pminub pmovmskb pmulhrw pmulhuw pmulhwpmullw por prefetch prefetchw prefetchnta prefetcht0 prefetcht1 prefetcht2psadbw pslld psllq psllw psrad psraw psrld psrlq psrlw psubb psubd psubsbpsubsw psubusb psubusw psubw punpckhbw punpckhdq punpckhwd punpcklbwpunpckldq punpcklwd pxor pshufwrcpps rcpss rdpmc rsqrtps rsqrtsssfence shufps sqrtps sqrtss stmxcsr subps subss syscall sysretucomiss unpckhps unpckps unpcklpsxmmword xorps另外：可以到http://www.ultraedit.com/downloads/extras.html#wordfiles下载语法高亮文件。 |
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